Over the past ten years digital radiation imaging has gradually been replacing conventional radiation imaging for certain applications. In conventional radiation imaging applications, the detecting or recording means is a photosensitive film or an analog device such as an Image Intensifier. Digital radiation imaging is performed by converting radiation impinging on the imaging device to an electronic signal inside a converting material and consequently digitizing such electronic signal.
Devices for performing digital radiation imaging currently exist. In some such devices, the impinging or incident radiation is converted locally into electrical charge which is then collected at collection contacts/pixels, and then communicated as electronic signals to readout circuits. The readout circuits perform various functions including digitization. In other devices, the impinging radiation is converted into light which is then subsequently converted to an electronic signal which is read out and digitized. The first instance is referred to as direct radiation detection and the second as indirect radiation detection.
Direct radiation detection devices typically comprise a photo-conductor substrate or detector which converts the impinging radiation into electronic signals. The detector substrate is conductively bonded to a readout substrate which receives the electronic signals, processes and reads them out, i.e., conditions the signals for imaging. There are different kind of photo-conductor/detector substrate technologies and different readout substrate technologies used in direct radiation detection devices. These include: SBBASIC (Semiconductor Bump-Bonded on ASIC), a-SGTFT (amorphous Semiconductor Grown on TFT), and a-SGASIC (amorphous Semiconductor Grown on ASIC). ASIC stands for Application Specific Integrated Circuit and TFT stands for Thin Film Transistor array.
SBBASIC type imaging devices typically comprise at least two substantially coplanar semiconductor substrates: a crystalline semiconductor detector substrate (photo-conductor) discretely bonded to a semiconductor readout substrate. The detector substrate has a continuous bias electrode on its first major surface and a two dimensional array of charge collecting contacts on its second opposite major surface. Incoming radiation impinges on the first surface of the detector substrate and is absorbed by the photo-conductor material. Electrical charges are generated in the photo-conductor material in response to the absorption of the radiation. Under the influence of an electrical field bias created by the electrode, the generated charges drift toward and are collected at the charge collector contacts (or charge collection electrodes) at the second surface of the detector. Each charge collector contact defines a “pixel” on the detector substrate second surface. Each pixel is individually and conductively connected to a corresponding “pixel circuit input” on the adjacent surface of the readout substrate by an individual bump-bond. Each pixel circuit input is an input to an ASIC processed on the readout substrate. The ASIC includes a plurality of various circuit features for amplifying, storing, digitizing, etc. the electrical charge signals.
Various types of bump-bond solders are known in the art for conductively bonding corresponding pixels and pixel circuit inputs on the semiconductor substrates of SBBASIC devices. Most of these solder alloys include elemental Lead as a component, which is an environmental pollutant and processes which utilize this substance can create a toxic waste stream. It would be beneficial in the field to have a lead-free solder alloy for accomplishing bump bonds, to avoid or reduce production of this toxic waste stream.
Lead free solders for various high tech electronic applications are known in the art. For example, Nishimura, U.S. Pat. No. 6,296,722, discloses a lead-free solder alloy characterized by and comprising Tin, Copper and Nickel having a melting point of approximately 227° C. Domi et al., U.S. Pat. No. 6,319,461, disclose a lead-free solder alloy consisting of Tin and Titanium. However, this alloy has a melting point of 250° C., and must be further alloyed with other metals in order to lower its melting point. Even when so alloyed, Domi et al. do not disclose a lead-free solder alloy having a melting point below about 203° C. Sakai et al. disclose a ternary lead-free solder for joining electronic parts having Tin, Silver and Copper as its principle components. The Sakai solder may be further alloyed with additional metals, however, the melting point disclosed for the various Sakai alloys is still above the melting point of a eutectic PbSn solder. Koshi et al., U.S. Pat. No. 6,334,570, disclose a soldering method using a preliminary “tinning” or coating alloy of Tin and Copper and a soldering alloy of Tin, Silver, Copper and Bismuth or variation thereof. The melting point of the Koshi “tinning” alloy is 227° C., and the melting point of the soldering alloy is 217° C. Most recently, Yamashita et al., U.S. Pat. No. 6,365,097, disclose a lead-free, quaternary based solder alloy comprising Bismuth, Tin and Silver with Nickel and/or Germanium and with or without Copper. Although the melting points of the various Yamashita solder alloys are not clearly set forth, the lowest reported melting point is 185° C.
The melting point of a solder alloy for use in forming bump-bonds is important because the new high resolution semiconductor imaging devices often comprise temperature sensitive detector substrates. Temperature sensitive substrates are those which potentially can suffer deleterious affects upon exposure temperatures above about 180° C. in the process of producing the imaging device of which they are a component. Although the above noted lead-free solders may be useful for their intended purposes, their relatively high melting point temperatures may make them unsuitable for certain bump-bonding applications involving such temperature sensitive semiconductor substrates. For example, temperature sensitive semiconductor detector substrates include some of the currently most promising intermetallic or compound semiconductor materials, such as Cadmium-Telluride (CdTe) and Cadmium-Zinc-Telluride (CdZnTe). However, current bump-bonding techniques using eutectic PbSn solders (melting point ˜183° C.), or the above mentioned lead-free solders, cannot fulfill all the requirements for assembling the semiconductor substrates of these new high-density, temperature sensitive imaging devices. Therefore, it would be further beneficial in the art to have an alternative solder alloy for forming bump-bonds that has a relatively low melting point (below eutectic PbSn alloys) and also is lead-free.
Additionally, while each of the above noted solder alloys may have its utility in certain situations, as the complexity of an alloy increases, the accumulative effect of the limitations of the alloy's individual components can render it unsuitable or unpredictable for other applications in respect of the performance, manufacturability, reliability and cost. Some of these limitations are listed below.
Indium (In). In is used in infrared focal arrays. Disadvantages relating to
In as an electronic radiation imaging device interconnect include:
a. Bonding is done with a thermal compression cycle. Bonding pressure can be very high depending on the number of interconnects. This puts severe requirements to the flatness and parallelism of the detectors and readout substrate
b. The process is double sided, i.e., both ASIC and detector substrates need to be processed with In bumps. This makes the process expensive.
Lead-Tin (PbSn). PbSn is the oldest solder alloy. Limitations to its use in temperature sensitive electronic imaging devices include:
a. It is a high temperature process. The reflow point of eutectic lead tin is 183° C. which is too high for the most x-ray sensitive and novel detector materials such as CdTe (Cadmium Telluride) and CdZnTe (Cadmium Zinc Telluride).
b. It contains lead (Pb) which is progressively banned from manufacturing processes.
Bismuth-Lead-Tin (BiPbSn). BiPbSn is a low temperature solder alloy useful with reflow processes, but has the following limitations:
a. It is a three metal alloy making it harder to control. Strict and continuous process control is needed to ensure good manufacturing yield and reliability. Three metals alloying together makes this process more complicated than the rest.
b. It has a eutectic reflow temperature of about 94° C. At this low temperature a lot of commercial under-filling materials cannot polymerize properly. Under-filling is used during or after bump-bonding to provide reliability and long term endurance to the bonds. But such under-fills are cured typically between 95° C. and 120° C. which would make the BiPbSn solder reflow again. In relation to CdTe and CdZnTe electronic radiation imaging devices this is a severe limitation because it removes the option of an under-fill which is needed in many cases.
c. It contains Pb which is progressively banned from the manufacturing processes. Such electronic radiation imaging devices are described for example in U.S. Pat. No. 5,952,646 disclosed herewith.
Gold (Au. Gold stud bumps have been used for some time in prototype electronic imaging devices, but Au has the following limitations:
a. The temperature is too high for use with temperature sensitive materials such as CdTe and CdZnTe.
b. There is a limitation on the minimum pitch that can reliably be achieved in pixel arrays.
c. Manufacturing throughput is lower than that of wafer scale processes.
Indium-Tin (InSn). InSn solder alloy is a relatively low temperature process, but has the limitation that Indium oxidizes naturally within seconds from deposition and it makes the reflow bonding process unreliable.
In view of the above, it would be beneficial in the field to have a less complicated low temperature, lead free solder that did not require the alloying of several different metals to accomplish its utility. Some of the advantages of a lead-free, low temperature, binary solder alloy should embody include:                a reflow (melting point) temperature that is lower than that of eutectic PbSn (183° C.), but higher than the reflow temperature of BiPbSn (under 100° C.). This would allow bump-bonding of temperature sensitive photo-conductors such as CdTe and CdZnTe, and at the same time not limit the use of under-fills.        only two component metals.        it should be lead-free.        it should not oxidize or at least not oxidize as fast as InSn        it can be initially applied only to the readout substrates (ASIC) while still incorporated on the ASIC wafer, thus making manufacturing throughput higher (unlike In bumping).        bump-bonding is accomplished via a reflow state, thus the process is much more forgiving to substrate anomalies and lack of flatness (unlike In bonding).        